Jornal Internacional de Avanços em Tecnologia

Jornal Internacional de Avanços em Tecnologia
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ISSN: 0976-4860

Abstrato

FIR Filter Implementation on A FPGA Allowing Signed and Fraction Coefficients with Coefficients Obtained Using Remez Exchange Algorithm

Animesh Panda, Satish Kumar Baghmar, Shailesh Kumar Agrawal, T.Siva Kumar, T. Usha

A filter may be required to have a given frequency response, or a specific response to an impulse, step, or ramp, or simulate an analog system. Depending on the response of the system, digital filters can be classified into Finite Impulse Response (FIR) filters & Infinite Impulse Response (IIR) filters. FIR Filters can be designed using frequency sampling or windowing methods. But these methods have a problem in precise control of the critical frequencies. In the optimal design method, the weighted approximation error between the actual frequency response and the desired filter response is spread across the pass-band and the stop-band and the maximum error is minimized, resulting in the pass-band and the stop-band having ripples. The peak error can be computed using a computer-aided iterative procedure, known as the Remez Exchange Algorithm.

Isenção de responsabilidade: Este resumo foi traduzido com recurso a ferramentas de inteligência artificial e ainda não foi revisto ou verificado.
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